Job Details

Design Verification Architect – AI Compute IP

  2026-05-06     Amadeus Search     San Francisco,CA  
Description:

A fast-growing AI startup is seeking a Design Verification Engineer to lead verification efforts for internal IP blocks. You'll collaborate with design teams, develop verification strategies, and ensure high-quality integration into larger systems. Candidates should have 5+ years in design verification, proficiency in SystemVerilog, and excellent debugging skills. This role offers competitive compensation and the chance to work in a pioneering environment focused on AI workloads.#J-18808-Ljbffr


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