Job Details

Principal Verification Engineer

  2025-06-28     Tara Technical Solutions (TTS)     San Francisco,CA  
Description:

Tara Technical Solutions (TTS) provided pay range

This range is provided by Tara Technical Solutions (TTS). Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$145,000.00/yr - $225,000.00/yr

Direct message the job poster from Tara Technical Solutions (TTS)

Tara Technical Solutions Recruiting- 24 Years of Semiconductor Recruiting.

2 Openings for a Senior and a Principal ASIC DV engineer.

Full-Time- Direct Hire with our Fortune 500 Client.

Work on high performance design team responsible for state-of-the-art subsystem development to meet customer requirements.

The engineer will be responsible for a variety of advanced verification tasks such as: verification environment development using modern verification techniques (System Verilog and UVM); designing verification components such as UVM agents, and behavioral models; implementing coverage and assertions using System Verilog; and developing random & directed test cases against the specification.

Job Requirements:

Experience in verifying designs at system level and block level.

Fluent knowledge of RTL verification methodologies including System Verilog.

Strong experience in ASIC design verification flows and DV methodologies.

Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills.

Experience with hardware design and debug, C++/SystemC and other programming languages are a strong plus.

- Experience with hardware design and debug, C++/SystemC and other programming languages are a strong plus.

Familiarity with overall chip design methodologies and tools.

Knowledge of CPU, DDR, Bus Protocol, Network Protocol or DSP design preferred.

***Having PCie is a nice to have but not a Must Have.

* H1B Transfer IS NOT open at this time.

Seniority level

  • Seniority level

    Mid-Senior level

Employment type

  • Employment type

    Full-time

Job function

  • Job function

    Engineering and Design
  • Industries

    Semiconductor Manufacturing, Computer Hardware Manufacturing, and Computers and Electronics Manufacturing

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Inferred from the description for this job

Medical insurance

Vision insurance

401(k)

Paid maternity leave

Child care support

Pension plan

Paid paternity leave

Student loan assistance

Disability insurance

Tuition assistance

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