YOU MUST HAVE WORKING KNOWLEDGE OF EDA tools and Semiconductors!
…..PLEASE HAVE EDA/SEMICONDUTOR EXPERIENCE WHEN APPLYING!
ASIC Design Engineer – CMOS experience Bay area #8018
In this role, you will not be doing actual ASIC “Design”, but you need to have worked or been deeply involved in Design.
My client is a very promising well-funded startup at the cutting edge of integrating LLMs with chip design. Their team is composed of experts in the fields of AI, software development, and semiconductor design. The founders have an amazing background and pedigree, perfect for this venture.
This totally new approach to chip design is a game changer and with their strong foundation and existing customer base, they are positioned to redefine the landscape of chip design.
Job Description:
They are looking for skilled and passionate DESIGN Engineers who have significant experience with VLSI front-end design flows, and CMOS to collaborate closely with their ML and software teams. In this unique role, you will apply LLM's for DV; you will work on advanced technologies that leverage your design experience with ML for innovative chip design solutions; You will have the opportunity to learn from experienced ML leads and directly contribute to projects for their existing customers.
This position is ideal for a chip designer who is eager to push beyond traditional roles and explore the frontier of AI-integrated semiconductor design. This terrific opportunity will give you the opportunity to make a real and significant contribution, as they unleash this existing, yet totally new approach to CHIP DESIGN.
Key Responsibilities:
Qualifications:
As a young startup funded by top VCs in Silicon Valley, this is a unique opportunity that you can't really get anywhere else:
To learn more about this and other openings, contact Mark Gilbert anytime by email, ...@eda-careers.com or call 305-###-####x3. Please include your resume so we can have a more precise conversation.